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<p class="MsoNormal"><b>Workshop on Silicon Errors in Logic – System Effects (SELSE 2014)<o:p></o:p></b></p>
<p class="MsoNormal">April 1 – 2, 2014 – Stanford University<o:p></o:p></p>
<p class="MsoNormal">Website: <a href="http://www.selse.org">http://www.selse.org</a><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b>Important dates:<o:p></o:p></b></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Register an abstract: <s>December 13, 2013</s> <span style="color:red">
December 30, 2013</span><o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Paper submission: <s>December 20, 2013</s><span style="color:red"> January 6, 2014</span><o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Authors notification: February 4, 2014<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l0 level1 lfo1"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Camera-ready submission: February 28, 2014<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b>This year’s workshop will feature keynote talks by:<o:p></o:p></b></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Bill Dally (NVIDIA)<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Karl Grebb (Texas Instruments)<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Tom Pawlowski (Micron)<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b>Overview:<o:p></o:p></b></p>
<p class="MsoNormal">The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible to the influences of electrical noise, process variation, transistor aging, and the
effects of natural radiation. The system-level impact of these errors can be far-reaching. Growing concern about intermittent errors, unstable storage cells, and the effects of aging are influencing system design and failures in memories account for a significant
fraction of costly product returns. The SELSE workshop provides a forum for discussing current research and practice in system-level error management. Participants from industry and academia explore both current technologies and future research directions
(including nanotechnology). SELSE is soliciting papers that address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-level, and semiconductor processes. Case studies are also solicited.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Key areas of interest are (but not limited to):<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Technology trends and the impact on error rates.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>New error mitigation techniques.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Characterizing the overhead and design complexity of error mitigation techniques.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Case studies describing the tradeoffs analysis for reliable systems.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Experimental silicon failure data.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>System-level models: derating factors and validation of error models.<o:p></o:p></p>
<p class="MsoListParagraph" style="text-indent:-.25in;mso-list:l1 level1 lfo2"><![if !supportLists]><span style="font-family:Symbol"><span style="mso-list:Ignore">·<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]>Error handling protocols (higher-level protocols for robust system design).<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Authors are requested to register an abstract by <b><span style="color:red">December 30th, 2013</span></b><span style="color:red">
</span>and to submit their paper by <b><span style="color:red">January 6th, 2014</span></b>
<span style="color:red">(extended deadlines)</span>. Papers will be considered for both oral and poster presentation. All accepted submissions are included in the workshop proceedings. Authors will be notified by
<b>February 4th, 2014</b>. Camera-ready papers are due on <b>February 28th, 2014</b>.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Additional information and guidelines for submission are available at
<a href="http://www.selse.org">http://www.selse.org</a>. Submissions should be in PDF following IEEE two-column conference proceedings format that does not exceed four printed pages. Final papers may be up to six pages in length. Papers are
<b>not</b> made available through IEEE and authors retain the copyright of their work. Authors may optionally choose to make their final papers and/or presentations available online at the workshop web site.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b>Organizing Committee<o:p></o:p></b></p>
<p class="MsoNormal" style="margin-top:6.0pt">General chairs: Vilas Sridharan, AMD<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:1.5in;text-indent:.5in">Sarah Michalak, LANL<o:p></o:p></p>
<p class="MsoNormal" style="margin-top:6.0pt">Program chairs: Adrian Evans, iROC Technologies<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:1.5in;text-indent:.5in">Dimitris Gizopoulos, University of Athens<o:p></o:p></p>
<p class="MsoNormal" style="margin-top:6.0pt">Finance chairs: Dan Alexandrescu, iROC Technologies<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:1.5in;text-indent:.5in">Naveen Muralimanohar, HP<o:p></o:p></p>
<p class="MsoNormal" style="margin-top:6.0pt">Local arrangements chair: Helia Naeimi, Intel<o:p></o:p></p>
<p class="MsoNormal" style="margin-top:6.0pt">Publicity chairs: William H. Robinson, Vanderbilt University<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:1.5in;text-indent:.5in">Yanos Sazeides, University of Cyprus<o:p></o:p></p>
<p class="MsoNormal" style="margin-left:1.5in;text-indent:.5in">Paolo Rech, UFRGS<span style="color:#1F497D"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:6.0pt">Proceedings chair: Mehdi Tahoori, Karlsruhe Institute of Technology<o:p></o:p></p>
<p class="MsoNormal" style="margin-top:6.0pt">Webmaster: Marios Kleanthous, Mesoyios College<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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