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<p class="MsoNormal">Workshop on Silicon Errors in Logic – System Effects (SELSE 2013)<o:p></o:p></p>
<p class="MsoNormal">March 26-27, 2013 - Stanford University<o:p></o:p></p>
<p class="MsoNormal">Website: <a href="http://softerrors.info/selse/">http://softerrors.info/selse/</a><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Important dates:<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"> Extended abstract submission: December 14, 2012<o:p></o:p></p>
<p class="MsoNormal"> Authors notification: February 2, 2013<o:p></o:p></p>
<p class="MsoNormal"> Camera-ready submission: March 4, 2013<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The growing complexity and shrinking geometries of modern device technologies are making high-<o:p></o:p></p>
<p class="MsoNormal">density, low-voltage devices increasingly susceptible to the influences of electrical noise, process
<o:p></o:p></p>
<p class="MsoNormal">variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can
<o:p></o:p></p>
<p class="MsoNormal">be far-reaching. Growing concern about intermittent errors, unstable storage cells, and the effects of aging
<o:p></o:p></p>
<p class="MsoNormal">are influencing system design. This workshop provides a forum for discussing current research and
<o:p></o:p></p>
<p class="MsoNormal">practice in system-level error management. Participants from industry and academia explore both current
<o:p></o:p></p>
<p class="MsoNormal">technologies and future research directions (including nanotechnology). SELSE is soliciting papers that
<o:p></o:p></p>
<p class="MsoNormal">address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-<o:p></o:p></p>
<p class="MsoNormal">level, and semiconductor processes. Case studies are also solicited.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Key areas of interest are (but not limited to):<o:p></o:p></p>
<p class="MsoNormal">* Technology trends and the impact on error rates.<o:p></o:p></p>
<p class="MsoNormal">* New error mitigation techniques.<o:p></o:p></p>
<p class="MsoNormal">* Characterizing the overhead and design complexity of error mitigation techniques.<o:p></o:p></p>
<p class="MsoNormal">* Case studies describing the engineering tradeoffs necessary to decide what mitigation technique to<o:p></o:p></p>
<p class="MsoNormal"> apply.<o:p></o:p></p>
<p class="MsoNormal">* Experimental data.<o:p></o:p></p>
<p class="MsoNormal">* System-level models: derating factors and validation of error models.<o:p></o:p></p>
<p class="MsoNormal">* Error handling protocols (higher-level protocols for robust system design).<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Authors are requested to submit extended abstracts for review before December 14, 2012. Extended
<o:p></o:p></p>
<p class="MsoNormal">abstracts will be considered for both oral and poster presentation. All accepted submissions are included
<o:p></o:p></p>
<p class="MsoNormal">in the workshop proceedings. Authors will be notified of paper outcome by February 2, 2013. Camera-<o:p></o:p></p>
<p class="MsoNormal">ready papers are due on March 4, 2013.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Additional information and guidelines for submission are available at
<a href="http://www.selse.org">www.selse.org</a>. Submissions should <o:p></o:p></p>
<p class="MsoNormal">be PDF or Microsoft Word files in IEEE format that do not exceed four printed pages. Camera-ready
<o:p></o:p></p>
<p class="MsoNormal">papers can be up to six pages in length in IEEE format. Papers are not made available through IEEE and
<o:p></o:p></p>
<p class="MsoNormal">authors retain the copyright of their work. Authors may optionally choose to make their final papers
<o:p></o:p></p>
<p class="MsoNormal">available online through the SELSE webpage.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Organizing committee (see <a href="http://www.selse.org">www.selse.org</a> for complete membership):<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">General Chair: Vilas Sridharan, AMD<o:p></o:p></p>
<p class="MsoNormal">Past General Chair: Alan Wood, Oracle<o:p></o:p></p>
<p class="MsoNormal">Program Co-chairs: Adrian Evans, iRoC Technologies and Yanos Sazeides, University of Cyprus<o:p></o:p></p>
<p class="MsoNormal">Finance Chairs: Anand Dixit, Oracle and Sarah Michalak, LANL<o:p></o:p></p>
<p class="MsoNormal">Local Arrangements Chair: Helia Naemi, Intel<o:p></o:p></p>
<p class="MsoNormal">Publicity Chair: William H. Robinson, Vanderbilt University<o:p></o:p></p>
<p class="MsoNormal">Webmaster: Marios Kleanthous, University of Cyprus<o:p></o:p></p>
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