[Hpcresilience] Call for Papers - SELSE 2017: March 22 – 23, 2017 - Boston, MA, USA

Robinson, William H william.h.robinson at Vanderbilt.Edu
Thu Dec 1 09:52:17 MST 2016


The 13th IEEE Workshop on Silicon Errors in Logic – System Effects
SELSE 2017 (http://www.selse.org<http://www.selse.org/>)

March 22 – March 23, 2017 – Boston, Massachusetts, USA



Important dates:


∙         Paper submission:                     January 6, 2017

∙         Authors notification:                 February 20, 2017

∙         Camera-ready submission:       March 1, 2017


The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible to the influences of electrical noise, process variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can be far-reaching. Growing concern about intermittent errors, unstable storage cells, and the effects of aging are influencing system design and failures in memories account for a significant fraction of costly product returns. Emerging logic and memory device technologies introduce several reliability challenges that need to be addressed to make these technologies viable. Additionally, reliability is a key issue for large-scale systems, such as those in data centers and cloud computing infrastructure.

The SELSE workshop provides a forum for discussion of current research and practice in system-level error management. Participants from industry and academia explore both current technologies and future research directions. SELSE is soliciting papers that address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-level, and semiconductor processes. Case studies are also solicited.



Key areas of interest are (but not limited to):

·         Technology trends and their impact on error rates.

·         New error mitigation techniques.

·         Error handling protocols (higher-level protocols for robust system design).

·         Characterizing the overhead and design complexity of error mitigation techniques.

·         Case studies describing the tradeoff analysis for reliable systems.

·         System-level models: derating factors and validation of error models.

·         Experimental data on failures in current and emerging technologies

·         Characterization of reliability of systems deployed in the field and mitigation of issues.

·         Software-level impact of hardware failures.

·         Software frameworks for resilience.

·         Impact of machine learning components on system resilience.

·         Resilient accelerator-rich systems.



There is no required abstract registration this year, but registering abstracts early does help plan the review process, so we encourage you to do so. The full paper submission deadline is January 6, 2017 (absolutely no extensions). Papers will be considered for both oral and poster presentation, and all accepted submissions will be distributed to SELSE participants. Authors will be notified by February 20, 2017. Final papers are due on March 1, 2017. All times 11:59 pm CST.

Additional information and guidelines for submission are available at http://www.selse.org<http://www.selse.org/>.  Submissions and final papers should be in PDF following IEEE two-column transactions format that does not exceed six printed pages of text; the bibliography does not count against this page limit. Papers are not published through IEEE.


Organizing Committee


General Chairs


Dan Alexandrescu, iRoC



Siva Hari, NVIDIA


Program Chairs


Mattan Erez, The University of Texas at Austin



Paolo Rech, UFRGS


Finance Chairs


Daniel Lowell, AMD

Laura Monroe, LANL


Publicity Chairs


William H. Robinson, Vanderbilt University

Fernanda Kastensmidt, UFRGS

Yiannakis Sazeides, University of Cyprus

Kobayashi Kazutoshi, KIT


Documents Chair


Fritz Previlon, Northeastern University


Industry Liaison


Indrani Paul, AMD


Webmaster


Marios Kleanthous, Mesoyios College


Local Arrangements Chair


David Kaeli, Northeastern University


Advisors to the Committee


Sarah Michalak, LANL

Alan Wood, Oracle

Vilas Sridharan, AMD

Adrian Evans, iRoC




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