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<p class="MsoNormal"><i>We are pleased to announce that the submissions website is now open for SELSE 2018, to be held in Boston, Massachusetts.
</i><i><span style="font-size:12.0pt;color:black">The SELSE workshop provides a forum for discussion of current research and practice in system-level error management, and the top SELSE papers will be included in the “Best of SELSE” session at IEEE/IFIP International
Conference on Dependable Systems and Networks (DSN), 2018.</span><o:p></o:p></i></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt;color:black">The 14<sup>th</sup> IEEE Workshop on Silicon Errors in Logic – System Effects
<br>
SELSE 2018 (</span></b><a href="http://www.selse.org/"><span style="font-size:12.0pt;color:#0B4CB4">http://www.selse.org</span></a><b><span style="font-size:12.0pt;color:black">)</span></b><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">April 3 – April 4, 2018, Boston, Massachusetts, USA</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="mso-margin-top-alt:10.0pt;margin-right:0in;margin-bottom:4.0pt;margin-left:0in">
<b><span style="font-size:12.0pt;color:black">Important dates:</span></b><b><span style="font-size:12.0pt"><o:p></o:p></span></b></p>
<p class="MsoNormal" style="mso-margin-top-alt:4.0pt;margin-right:0in;margin-bottom:4.0pt;margin-left:0in">
<b><span style="font-size:12.0pt;color:black">• Abstract submission (mandatory): January 5, 2018
</span></b><b><span style="font-size:12.0pt"><o:p></o:p></span></b></p>
<p class="MsoNormal" style="margin-top:4.0pt"><b><span style="font-size:12.0pt;color:black">• Paper submission (for registered abstracts): January 12, 2018
</span></b><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:4.0pt"><b><span style="font-size:12.0pt;color:black">• Authors notification: February 16, 2018</span></b><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:4.0pt"><b><span style="font-size:12.0pt;color:black">• Camera-ready submission: March 1, 2018</span></b><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:10.0pt;text-align:justify"><span style="font-size:12.0pt;color:black">The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible
to the influences of electrical noise, process variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can be far-reaching especially in safety-critical applications like aerospace and automotive. Growing
concern about transient errors, unstable storage cells, and the effects of aging are influencing system and application design. While the computational capabilities of emerging logic and memory device technologies are attractive for several safety-critical
applications and new computing philosophies like deep learning become popular, they introduce several reliability challenges that need to be addressed. Additionally, reliability is a key issue for large-scale systems, such as those in data centers and cloud
computing infrastructure. <b>This year</b>, we also welcome papers on the system security issues as they relate to and impact system reliability.</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:10.0pt;text-align:justify"><span style="font-size:12.0pt;color:black">We are happy to announce that top SELSE papers will be included in the “Best of SELSE” session at IEEE/IFIP International Conference on Dependable Systems
and Networks (DSN), 2018. These papers will be selected based on the importance of the problem being addressed, technical contributions, quality of results, and authors’ agreement to travel to present at DSN 2018, which will be held in Luxembourg City, Luxembourg.</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="margin-top:10.0pt;text-align:justify"><span style="font-size:12.0pt;color:black">The SELSE workshop provides a unique forum for discussion of current research and practice in system-level error management. Participants from industry
and academia explore both current technologies and future research directions. SELSE is soliciting papers that address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-level, and semiconductor processes. Case
studies in real-world contexts are also solicited.</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="mso-margin-top-alt:14.0pt;margin-right:0in;margin-bottom:4.0pt;margin-left:0in;text-align:justify">
<b><span style="font-size:12.0pt;color:black">Areas</span></b><b><span style="font-size:12.0pt"><o:p></o:p></span></b></p>
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Key areas of interest are (but not limited to):</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<ul style="margin-top:0in" type="disc">
<li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Technology trends and their impact on error rates.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">New error mitigation techniques.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Error handling protocols (higher-level protocols for robust system design).<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Characterizing the overhead and design complexity of error mitigation techniques.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Case studies describing the tradeoff analysis for reliable systems.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">System-level models: derating factors and validation of error models.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Experimental data on failures in current and emerging technologies and applications<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Characterization of reliability of systems deployed in the field and mitigation of issues.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Software-level impact of hardware failures.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Software frameworks for resilience.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Impact of machine learning components on system resilience.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Resilient accelerator-rich systems.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<span style="font-size:12.0pt">Inexact or approximate computing as it relates to system errors.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<b><span style="font-size:12.0pt">(New) </span></b><span style="font-size:12.0pt">Cross-layer resilience techniques.<o:p></o:p></span></li><li class="MsoNormal" style="color:black;text-align:justify;mso-list:l0 level1 lfo1;vertical-align:baseline">
<b><span style="font-size:12.0pt">(New)</span></b><span style="font-size:12.0pt"> System security issues that impact and interact with system reliability.<o:p></o:p></span></li></ul>
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black"> </span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="mso-margin-top-alt:10.0pt;margin-right:0in;margin-bottom:10.0pt;margin-left:0in;text-align:justify">
<b><span style="font-size:12.0pt;color:black">Submission Guidelines</span></b><b><span style="font-size:12.0pt"><o:p></o:p></span></b></p>
<p class="MsoNormal" style="mso-margin-top-alt:10.0pt;margin-right:0in;margin-bottom:10.0pt;margin-left:0in;text-align:justify">
<span style="font-size:12.0pt;color:black">Additional information and guidelines for submission are available at
</span><a href="http://www.selse.org/"><span style="font-size:12.0pt;color:#0B4CB4">http://www.selse.org</span></a><span style="font-size:12.0pt;color:black">. Submissions and final papers should be in PDF following IEEE two-column transactions format that
does not exceed six printed pages of text; the bibliography does not count against this page limit. Papers are not published through IEEE/ACM nor archived in the digital libraries - however, they are distributed to attendees of the workshop. Authors have the
option of making their presentation slides available on the SELSE website, but this is not mandatory.
</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal" style="mso-margin-top-alt:14.0pt;margin-right:0in;margin-bottom:4.0pt;margin-left:0in;text-align:justify">
<b><span style="font-size:12.0pt;color:black">Organizing Committee</span></b><b><span style="font-size:12.0pt"><o:p></o:p></span></b></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<table class="MsoNormalTable" border="0" cellspacing="0" cellpadding="0" style="border-collapse:collapse">
<tbody>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">General Co-Chairs</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Siva Hari, NVIDIA</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt"></td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Laura Monroe, LANL</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Program Co-Chairs</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Paolo Rech, UFRGS</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt"></td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Karthik Pattabiraman, UBC</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Finance Co-Chairs</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Laura Monroe, LANL</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Steven Raasch, AMD</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Publicity Co-Chairs</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Michael Sullivan, NVIDIA</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Tiago Balen, UFRGS</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Stefano Di Carlo, PoliTo</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Yi-Pin Fang, TSMC</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Documents Chair</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Fritz Previlon, <br>
Northeastern University</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Industry Liaison</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Jon Stephan, Intel</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Webmaster</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Masab Ahmad, UCONN<br>
Omer Khan, UCONN</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Local Arrangements Chair</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Devesh Tiwari, <br>
Northeastern University</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
<tr>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal" style="text-align:justify"><span style="font-size:12.0pt;color:black">Advisors to the Committee</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
<td valign="top" style="padding:0in 5.75pt 0in 5.75pt">
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Sarah Michalak, LANL</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Alan Wood, Oracle</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Vilas Sridharan, AMD</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Adrian Evans, iRoC</span><span style="font-size:12.0pt"><o:p></o:p></span></p>
</td>
</tr>
</tbody>
</table>
<p class="MsoNormal"><o:p> </o:p></p>
</div>
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