From misullivan at nvidia.com Mon Dec 28 16:25:40 2020 From: misullivan at nvidia.com (Michael Sullivan) Date: Mon, 28 Dec 2020 23:25:40 +0000 Subject: [Hpcresilience] =?windows-1252?q?Call_for_Papers_=28Extended_Dead?= =?windows-1252?q?line!=29=3A_The_17th_IEEE_Workshop_on_Silicon_Errors_in_?= =?windows-1252?q?Logic_=96_System_Effects_=28SELSE_2021=29?= Message-ID: The 17th IEEE Workshop on Silicon Errors in Logic ? System Effects SELSE 2021 (http://www.selse.org) April 21 ? April 22, 2021 VIRTUAL EVENT (low registration fee, high flexibility, great networking opportunity!) Important dates: * Full Paper Submission : January 19, 2021 * Author Notification: March 01, 2021 * Early Registration: TBD * Camera-Ready Submission: March 24, 2021 The growing complexity and shrinking geometries of modern manufacturing technologies are making high-density, low-voltage devices increasingly susceptible to the influences of electrical noise, process variation, transistor aging, and the effects of natural radiation. The system-level impact of these errors can be far-reaching, both in safety-critical aerospace and automotive applications and for high performance applications. In the context of space and automotive applications the rapid market evolution and the increase in complexity of the electronic devices call for new methodologies to verify and increase the reliability of current and future COTS products. The SELSE workshop provides a unique forum for discussion of current research and practice in system-level error management. SELSE solicits papers that address the system-level effects of errors from a variety of perspectives: architectural, logical, circuit-level, and semiconductor processes. Case studies in real-world contexts are also welcome. We are happy to announce that the best papers presented at SELSE will be selected for inclusion in the ?Best of SELSE? session at IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2021. These papers will be selected based on the importance of the topic, technical contributions, quality of results, and authors? agreement to travel to present at DSN in Taipei, Taiwan on June 21 ? June 24, 2021. Areas Key areas of interest include (but are not limited to): * Error rates and trends in current and emerging technologies, including experimental failure data and characterization of deployed systems. * New error mitigation techniques, robust software frameworks, and error handling protocols for resilient system design. * New approaches to the robustness verification of complex safety-critical systems hardware and software platforms * Case studies analyzing the overhead, effectiveness, and design complexity of error mitigation techniques. * Resilience characterization and strategies for machine learning applications, including autonomous vehicles. * Resilience in new architectures, for example accelerator-rich systems and inexact or approximate computing. * The design of resilient systems for space exploration. * The interplay between system security issues and reliability. * Error model on quantum computer in NISQ era. * Error tolerant algorithms and design for quantum computing. Submission Guidelines Additional information and guidelines for submission are available at http://www.selse.org. Submissions and final papers should be PDF files following the IEEE two-column transactions format with six or fewer printed pages of text; the bibliography does not count against this page limit. Papers are not published through IEEE/ACM nor archived in the digital libraries---however, they are distributed to attendees of the workshop. Organizing Committee General Co-Chairs Paolo Rech, UFRGS and Politecnico di Torino Stefano Di Carlo, Politecnico di Torino Laura Monroe, LANL (Emerita) John Daly, LPS (Emeritus) Program Co-Chairs Qiang Guan, Kent State Carles Hern?ndez, UPV Finance Chair Marcelo Brandalero, Brandenburg University of Technology Cottbus-Senftenberg Registration Chair Karthik Swaminathan, IBM Local Arrangements Chair Irina Alam, UCLA Publicity Co-Chairs Michael Sullivan, NVIDIA (North America) Tiago Balen, UFRGS (South America) Stefano Di Carlo, PoliTo (Europe) Yi-Pin Fang, TSMC (Asia) Bay Area Industry Liaisons Shahrzad Mirkhani, Bigstream Mark Gottscho, Google Webmaster Vanessa Job, LANL/UNM Daniel Oliveira, UFPR Advisors to the Committee Sarah Michalak, LANL Alan Wood, Oracle Vilas Sridharan, AMD -------------- next part -------------- An HTML attachment was scrubbed... URL: